VERY LONG INSTRUCTION WORD (VLIW)
ARCHITECTURE
Very long instruction word or VLIW refers to a CPU architecture designed to take advantage of instruction level parallelism (ILP). The VLIW approach, on the other hand, executes operations in parallel based on a fixed schedule determined when programs are compiled. Since determining the order of execution of operations (including which operations can execute simultaneously) is handled by the compiler, the processor does not need the scheduling hardware. As a result, VLIW CPUs offer significant computational power with less hardware complexity (but greater compiler complexity) than is associated with most superscalar CPUs.
Comparison of cisc,risc and vliw
Source: http://www.site.uottawa.ca/~mbolic/elg6158/vliw1.ppt
The VLIW architecture is generalized from two well-established concepts: Horizontal micro coding and superscalar processing. A typical VLIW (very long instruction word) machine has instruction words hundreds of bits in length. As illustrated in the Figure-1, multiple functional units are used concurrently in a VLIW processor. All functional units share the use of a common large register file. The operations to be simultaneously executed by the functional units are synchronized in VLIW instruction, say, 256 or 1024 bits per instruction word, as implemented in the Multiflow computer models.
Fig-1, A typical VLIW processor and instruction format
Source: http://www.csbdu.in/virtual/DIGITAL%20MUP/5.3.php
Different fields of the long instruction word carry the opcodes to be dispatched to different functional units. Programs written in conventional short instruction words must be compacted together to form VLIW instructions and code compaction must be done by compiler .
Sources: Advanced computer architecture by Kai hwang
http://en.wikipedia.org/wiki/Very_long_instruction_word
http://www.csbdu.in/virtual/DIGITAL%20MUP/5.3.php
http://www.site.uottawa.ca/~mbolic/elg6158/vliw1.ppt
By- Tarun Kumar
No comments:
Post a Comment